Resources & Support

SiFive Press Room

August 17, 2023

MEDIA ALERT: SIFIVE’S LEADERSHIP TO KEYNOTE AT THE RISC-V SUMMIT CHINA 2023

WHAT: SiFive will be onsite at the RISC-V Summit China, scheduled for Aug. 23 – 25, 2023 in Beijing. Hosted in partnership with RISC-V International and the Beijing Institute of Open Source Chip (BOSC), SiFive will deliver two keynotes on the future of RISC-V and the latest on SiFive’s high-performance RISC-V processors. SiFive will also host a series of technical sessions focused on RISC-V vectors, ML compilers, hibernation, and more.

At the event, SiFive experts can speak to the company’s broad Core IP portfolio, spanning from high-performance application processors to area-optimized, low-power embedded 64- and 32-bit microcontrollers, to vector processors designed for modern compute requirements and artificial intelligence (AI), and optimized for the specific needs of the automotive industry.

At RISC-V Summit China, global innovators will share technical and business innovation around RISC-V. The summit features a multi-track conference, tutorials, exhibitions and poster sessions. There will be real-time Chinese to English translations for in-person and virtual attendees.

In-person and virtual attendees are encouraged to check out SiFive’s speaking sessions:

Wednesday, 23 August: • 15:20: KEYNOTE: The RISC-V Future is Unlimited: China’s Role with Yunsup Lee • 17:00: KEYNOTE: It Just Keeps Getting Better: RISC-V Processor Performance with Jack Kang

Friday, 25 August: • 09:50: The Story of Getting RISC-V Vector in Linux with Andy Chiu and Zong Li • 14:10: Discovering the RVV C Intrinsics v1.0 with Eop Chen and Kito Cheng • 14:30: Software Components and Methodology for Designing and Optimizing RISC-V ML Compilers – A 3-Year Lesson of Collaboration With OpenXLA with Hong-Rong Hsu and Pen Li • 16:40: Accelerating the Migration from Arm Neon to RISC-V Vectors with Han-Kuan Chen

WHO: SiFive

WHEN: August 23-25, 2023 09:00 - 18:00 CST (23 August 2023) 09:00 – 19:10 CST (24-25 August 2023)

WHERE: RISC-V Summit China Shangri-La Hotel Beijing Beijing

Registration for the in-person and virtual event is open, register today.

To schedule a meeting with SiFive onsite at RISC-V China Summit, please email: sifive@racepointglobal.com.

About SiFive As the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest performance and most data-intensive applications in the world. SiFive’s unrivaled compute platforms have enabled leading technology companies around the world to innovate, optimize and deliver the most advanced solutions of tomorrow across every market segment of chip design, including artificial intelligence, machine learning, automotive, data center, mobile, and consumer. With SiFive, the future of RISC-V has no limits.

Follow live news and updates from the show floor with the #RISCVSummitChina hashtag on X and LinkedIn.

Media Contact Allison DeLeo Racepoint Global for SiFive SiFive@racepointglobal.com Tel.: +1(415)694-6711

Read more SiFive news

Upbeat Technology and SiFive Introduce Next-Gen Ultra-Low Power RISC-V MCU with AI Acceleration 
Blog Post
Upbeat Technology and SiFive Introduce Next-Gen Ultra-Low Power RISC-V MCU with AI Acceleration 
Upbeat Technology, a pioneer in ultra-low power compute, voice, and edge AI sensing solutions, and SiFive, Inc., the leading provider of commercial RISC-V processor IP and silicon solutions, announce the UP201/UP301 family MCU, a next-generation dual-core RISC-V microcontroller designed for ultra-low power efficiency.
SiFive’s New RISC-V IP Combines Scalar, Vector and Matrix Compute to Accelerate AI from the Far Edge IoT to the Data Center
Blog Post
SiFive’s New RISC-V IP Combines Scalar, Vector and Matrix Compute to Accelerate AI from the Far Edge IoT to the Data Center
Further expanding SiFive’s lead in RISC-V AI IP, the company today launched its 2nd Generation Intelligence™ family, featuring five new RISC-V-based products designed to accelerate AI workloads across thousands of potential applications.
SiFive Collaborates with Red Hat to Support Red Hat Enterprise Linux for RISC-V
Blog Post
SiFive Collaborates with Red Hat to Support Red Hat Enterprise Linux for RISC-V
Developer preview of Red Hat Enterprise Linux 10 on SiFive HiFive Premier P550 platform provides developers with a platform to optimize a new class of enterprise and cloud computing applications Boston, Mass. – May 20, 2025 – SiFive, the gold standard for RISC-V, today announced a collaboration with...