Cloud Accelerated Idea To Silicon

The SiFive Mission

SiFive’s mission is to accelerate chip design, closing the time between the definition of a chip to silicon being available - we call this the ‘idea to silicon' journey. The solutions to modern computing challenges increasingly require domain-specific accelerators, silicon chips designed to solve a focused problem with built-in adaptability to provide flexibility for shifting workloads.

Today, Synopsys announced that SiFive has selected Synopsys Fusion Design Platform™ and Verification Continuum™ to further enable SiFive’s vision of rapid cloud-based design. SiFive will leverage Microsoft Azure to power our portfolio of design tools, enabling SiFive platform engineering to continue to scale and deliver high-quality IP and solutions for customer challenges.

With 16 design centers across the globe, SiFive leverages global collaboration tools to complete our work. And where those tools don’t exist, or need to be more efficient, we build them. Scalable chip design can be abstracted to a compiler and language problem, once you have established the parameters for interfaces on your SoC IP building blocks. With pre-integrated IP, scalable building blocks, and the power of cloud-based tools, silicon at the speed of software becomes a reality.

One popular example accelerator is machine learning inference; different inference processing models have different hardware design requirements. The market for deep learning accelerators is growing, as the global deep learning market is expected to grow at a CAGR of 51.1%, reaching a market value of over $56B US by 2026. Further forecasts show IoT growth reaching 25 billion devices by 2021 from the 2019 level of 14.2 billion. To reduce anticipated network pressure, data can be processed and decisions made at the edge or endpoint device.

On-device decisions drive new design requirements for the core, cache, memory, and processing offload accelerators used inside the silicon. An agile, scalable, programmatic approach to SoC design is required to create domain-specific accelerators and bring them to market quickly.

SiFive Core IP enables processor cores to be generated, based on standard core definitions in our product range with configurable options. SiFive Core Designer is an award-winning web-based tool for silicon engineers to quickly configure SiFive RISC-V based cores, leveraging the broad SiFive Core IP portfolio. This is enabled through the use of programmatic techniques for integrating IP and creating core derivatives using generators. In 2018, we proved the efficacy of the solution by using these techniques and tools to create an SoC in just 6 months, from concept to booting Linux.

Using a fully cloud-based methodology, SiFive taped out the SiFive Freedom Unleashed FU540 64-bit RISC-V Linux chip and presented the results at the 2019 Design Automation Conference in Las Vegas. The SoC features a SiFive U54 multicore complex plus interconnects for accelerators, high-speed I/O, and DDR3/4 memory.

The next level is the ability to rapidly enable new designs focused on domain-specific workloads. Shubu Mukherjee, SiFive Chief SoC Architect published a blog series on domain-specific accelerator (DSA) designs with SiFive RISC-V-based SoCs(1,2,3,4). Achieving rapid DSA enablement requires scaling the programmatic approach to core design to the whole SoC, leveraging high-quality cloud-based tools.

SiFive’s mission is to reduce the time, complexity and cost of custom silicon for people trying to solve today’s computing challenges. Today, we continue to scale our enablement of the idea to silicon process that will drive silicon at the speed of software. With SiFive, you can unleash your roadmap and declare silicon independence.