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SiFive Blog

The latest insights, and deeper technology dives, from RISC-V leaders

The SiFive blog is your go-to-source for updates on all things RISC-V including processor IP, chip architecture, software and other innovations. Whether you’re producing the next great consumer device, optimizing a datacenter or building next-generation autos check back often to hear the latest from our experts.

The Design Revolution in Europe: Highlights From the SiFive Tech Symposiums

May 30, 2019
We just wrapped up our six-city tour in Europe, which included Cambridge, Grenoble, Stockholm, Moscow, Munich and Amsterdam. Together with our co-hosts, Qamcom, Syntacore, Imagination Technologies and Mentor; and ecosystem partners, Rambus, IAR Systems, UltraSoC, Antmicro, SecureRF, Credo and lowRIS...
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The SiFive Tech Symposiums are Heading to Six Cities in Europe in May!

May 13, 2019
Hello Cambridge, Grenoble, Stockholm, Moscow, Munich and Amsterdam Our 2019 global symposiums and workshops have been hugely successful in promoting the RISC-V ISA and fostering expansive collaboration within the open-source community. It's invigorating to see how the worldwide semiconductor ecosyst...
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Freedom Studio Version 2019.03

Freedom Studio Version 2019.03

Mar 29, 2019
Ever since we launched Freedom Studio in 2017, it has been a great way to quickly and easily get started writing code for SiFive platforms, whether those platforms are development boards such as the HiFive1 Rev B, Digilent Arty FPGA, or even our testbench, which ships along with SiFive IP deliverab...
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Freedom Everywhere — Back for Everyone!

Mar 19, 2019
HiFive1 Rev B: The Second Generation HiFive1 Dev Board and the Freedom Everywhere SoC, FE310 When SiFive launched the FE310 and HiFive1 in 2016, the product received a very warm and enthusiastic reception. The project received much more attention and traction than we could have ever hoped for. We we...
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The Revolution Evolution Continues - SiFive RISC-V Technology Symposium - Part II

The Revolution Evolution Continues - SiFive RISC-V Technology Symposium - Part II

Mar 19, 2019
During the afternoon session of the Symposium, Jack Kang, SiFive VP sales then addressed the RISC-V Core IP for vertical markets from consumer/smart home/wearables to storage/networking/5G to ML/edge. Embedding intelligence from the edge to the cloud can occur with U Cores 64-bit Application Process...
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The Revolution Evolution Continues - SiFive RISC-V Technology Symposium - Part I

The Revolution Evolution Continues - SiFive RISC-V Technology Symposium - Part I

Mar 18, 2019
SiFive held a RISC-V Technology Symposium on February 26 at the Computer History Museum in Mountain View. Keith Witek, SiFive SVP Corporate Development and Strategy kicked off the event and introduced the first keynote speaker Martin Fink, Western Digital CTO, at the time acting CEO of the RISC-V Fo...
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